1. Field of the Invention
This invention relates generally to semiconductor fabrication and, more particularly, to an integrated circuit transistor having a very thin gate oxide layer and a high channel region nitrogen concentration, and to a method of making the same.
2. Description of the Related Art
The metal oxide semiconductor field effect transistor ("MOSFET") is one of the most commonly used electronic components in modern integrated circuits. Microprocessors, analog-to-digital converters, and many other types of devices now routinely include millions of MOSFETs. The dramatic proliferation of MOSFETs in integrated circuit design can be traced, in large part, to their high switching speeds, potentially low power dissipation, and adaptability to semiconductor process scaling.
A typical MOSFET implemented in silicon consists of a source and a drain formed in a silicon substrate, and separated laterally to define a channel region in the substrate. A gate electrode composed of a conducting material, such as aluminum or polysilicon, is disposed over the channel region. The gate electrode is designed to emit an electric field into the channel region. Changes in the electric field emitted by the gate electrode enable, or alternatively, disable the flow of current between the source and the drain.
The electrical performance of a MOSFET is dependent upon maintaining proper levels of several types of dopants in various regions in the substrate, including the channel region. To maintain the requisite composition of the channel region and to tailor the electric field generated by the gate electrode, a gate oxide layer, typically SiO.sub.2, is interposed between the gate and the silicon substrate. The gate oxide layer functions to prevent silicon underlying the gate from diffusing into the gate and forming voids in the substrate which can lead to the formation of conductor spikes in the channel region. In addition, the gate oxide layer retards diffusion of contaminants into the channel region which can degrade the electrical characteristics of the MOSFET.
Recent advances in semiconductor processing have plunged the minimum feature size for semiconductor circuits below 0.3 .mu.m. To maintain desirable electrical performance for MOSFETs with such shortened channel lengths, gate oxide thicknesses for MOSFETs have generally scaled downward in conjunction with the shrinking of minimum feature sizes. As the minimum feature size falls to 0.1 .mu.m and below, it is anticipated that gate oxide thicknesses scaled below 50 .ANG. will be advantageous.
Conventional fabrication processes for forming thin gate oxide layers present certain difficulties. To begin with, the growth rate of SiO.sub.2 in existing processes is difficult to control. As a consequence, gate oxide layers are often unintentionally grown with larger thicknesses than desired or with undesirably nonuniform thicknesses. In addition, thin SiO.sub.2 layers are prone to hot carrier degradation, particularly in PMOSFETs, and may have high defect densities that render them unsuitable as effective masks against the diffusion of impurities into the substrate.
Various methods have been proposed for producing SiO.sub.2 gate oxide layers that are not only thin, but also more resistant to hot carrier degradation and more suitable as impurity barriers. One method involves thermal nitridation of SiO.sub.2 in an NH.sub.3 ambient at high temperature. This method may result in the formation of undesirable electron traps in the gate oxide. In another method, a nitrided oxide layer is reoxidized. Although this method reduces the potential for electron traps, there remains the potential for undesirably thick oxides, higher than desired fixed charge densities, and the requirement for multiple high temperature steps that do not favor ULSI fabrication. Another method involves oxynitridation of a substrate in an N.sub.2 O ambient. This method can result in large nonuniformities in the composition of the oxide layer. One other method utilizes oxide growth in an O.sub.2 ambient followed by nitridation in an N.sub.2 O ambient. This method is complex and time consuming. A drawback common to all of the foregoing methods is the inability to form a thin gate oxide layer with a peak nitrogen concentration greater than about 0.5 to 3% at the Si--SiO.sub.2 interface.
The present invention is directed to overcoming or reducing one or more of the foregoing disadvantages.